W. Woo ;T. Nam ; H. Jung ; I. K. Oh ; J. G. Song ; H. B. R. Lee ; W. Maeng ; H. Kim
IEEE Electron Device Letters Volume:PP Issue:99
Abstract
The effects of TaN Cu diffusion barrier in Cu-gate ZnO:N thin-film transistors were studied. Bias stress tests were performed on Cu-gate TFTs with atomic layer deposited Al2O3 and HfO2 gate insulators. The mobility, threshold voltage, and reliability were significantly improved by applying a TaN diffusion barrier at the interface between the Cu gate and gate insulator. The reduction in Cu diffusion by the diffusion barrier is a key process that increases device stability and results in improved oxide TFT performance.